CMOS image sensors are beginning to replace conventional CCD sensors for applications requiring image pick-up such as digital cameras, cellular phones, PDA (personal digital assistant), personal computers, and the like. Advantageously, CMOS image sensors are fabricated by applying present CMOS fabricating process for semiconductor devices such as photodiodes or the like, at low costs. Furthermore, CMOS image sensors can be operated by a single power supply so that the power consumption can be restrained lower than that of CCD sensors, and further, CMOS logic circuits and like logic processing devices are easily integrated in the sensor chip and therefore the CMOS image sensors can be miniaturized.
Current CMOS image sensors comprise an array of pixel sensor cells, which are used to collect light energy and convert it into readable electrical signals. Each pixel sensor cell comprises a photosensitive element, such as a photodiode, photo gate, or photoconductor overlying a doped region of a substrate for accumulating photo-generated charge in an underlying portion thereof. A read-out circuit is connected to each pixel cell and often includes a diffusion region for receiving charge from the photosensitive element, when read-out. Typically, this is accomplished by a transistor device having a gate electrically connected to the floating diffusion region. The imager may also include a transistor, having a transfer gate, for transferring charge from the photosensitive element to the floating diffusion region, and a transistor for resetting the floating diffusion region to a predetermined charge level prior to charge transfer.
As shown in FIG. 1, a typical CMOS pixel sensor cell 10 includes a pinned photodiode 20 having a pinning layer 18 doped p-type and an underlying collection well 17 lightly doped n-type. P-type pinning layer 18 is electrically coupled to p-type substrate 15 by a doped p-type region 29. Typically, pinned photodiode 20 is formed on top of a p-type silicon substrate 15, or a p-type epitaxial silicon layer or p-well surface layer, having a lower p-type concentration than pinning layer 18. N region 17 and p region 18 of photodiode 20 are typically spaced between an isolation region 19 (i.e. shallow trench isolation (STI)) and a charge transfer transistor gate 25 which is surrounded by thin spacer structures 23a,b. The photodiode 20 thus has two p-type regions 18 and 15 having a same potential so that the n region 17 is fully depleted at a pinning voltage (Vp). The pinned photodiode 20 is termed “pinned” because the potential in the photodiode 20 is pinned to a constant value, Vp, when the photodiode 20 is fully depleted.
In operation, electromagnetic radiation 35 (i.e. visible light) impinging the pixel is focused down onto the photodiode 20 creating electron-hole pairs 40. Electrons collect at the n type region 17. When the transfer gate structure 25 is operated, i.e., turned on, the photo-generated charge 24 is transferred from the charge accumulating lightly doped n-type region 17 via a transfer device surface channel 16 to a floating diffusion region 30 which is doped n+ type. Charge on diffusion region 30 is eventually transferred to circuit structure 45 (i.e. source-follower gate) for amplification. In the conventional pixel sensor cell 10, holes equal in number to the electrons are generated by the impinging electromagnetic radiation 35 and are collected in the substrate 15. Since the substrate 15 is usually grounded, the holes exit the pixel sensor cell 10 through the ground line 50. Thus, only about half of the generated carriers (i.e. electrons) are collected to contribute to the output signal of the conventional pixel sensor cell.
In commonly assigned U.S. Pat. No. 6,194,702 filed on Aug. 25, 1997 to Hook et al. (hereinafter referred to as “Hook”), two complementary circuits (i.e. PFET and NFET circuits) are created for use with the photodiode with each circuit capturing electrons and holes, respectively. Portions of the electron and hole collection wells are used as source/drain regions for the respective NFET and PFET devices. The formation of active devices such as the NFET and PFET transistors in the photodiode reduces the area available to collect impinging electromagnetic radiation. Also, the process complexity is increased since additional films must be deposited and etched to form the NFET and PFET. Exposure of the upper substrate surface of the photodiode to the additional fabrication steps increases defects at the substrate surface of the photodiode which can have adverse effects on the pixel sensor cell of Hook such as an increase in dark current.